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Other hardware products 65 MHz, 2-channel 12-bit AD, 1-channel 12-bit DA board with 16 bits I/O high speed programmable port ![]() Features:
Functional Description: ADCruncher-65 is a high-speed analog and digital I/O board for PCI bus computers. It offers two 12-bits analog inputs, a 12-bit analog output and a 16-bit digital I/O port. Each input has its own high speed Analog to Digital converter (AD) capable of operating up to 65 Msps and the same is for the analog output. There is also a 16-bit digital I/O port which can be software splitted in two indipendent 8-bit ports; this port can operate as a common software controlled port or can access the internal memory buffers connected with the Data Transfer Engine, in this way it can operate at data transfer rate up to 65 MHz. An analog auxilary input, equipped with a software controlled comparator (from -4 V to +4 V) can be used as acquisition clock or trigger source. Furthermore, a 10-bit static DA (0 V to 2.048 V) is available for external uses. The acquisition/generation engine is built with three 512K by 32 bit static RAM and a custom FPGA chip. This sophisticated chip controls data flow across the RAM which can be used by the acquisition section or by the generation section. Both sections share a common clock -the acquisition clock- which can be on board generated or externally supplied through a dedicated digital input or through the auxiliary analog input. A divide-by-two prescaler is available to get a 50% duty cycle and it is possible to access 65 MHz and 50 MHz crystal generated sources. Trigger can be derived from the internal syncronism generator, from an externally supplied signal or from software. The internal generator is built around two 32-bit programmable counters, timed by the acquisition clock, which generates Frame/Track events with an advanced windowing system. ADCruncher-65 is completely plug-and-play. All boad settings, as address mapping, interrupt channel assignment etc., are set by the host computer plug-and-play software. Even board calibration is completely software controlled and does not require any kind of manual intervention. Key Specifications: Analog Input Section Resolution: 12 bits Input range: ±1V Number of channels: 2 Coupling: DC Input Bandwidth: 50MHz Input Impedance: 50 ohms or 500 kohms, solder gap selectable Analog Output Section Resolution: 12 bits Output range: ±1V Number of channels: 1 Coupling: DC Digital I/O Port Voltage levels: LVTTL (TTL 3.3 V, inputs are 5 V tolerant) Width: 16 bits section or 8+8 bits sections (each section has a unique, software controlled, direction) Clock Maximum frequency: 65 MHz Source: internal (65/50 MHz) or external (levels: LVTTL or programmable between -4 V and +4 V), divide-by-two prescaler available Trigger Source: software, internal timing generator or external signal (levels: LVTTL or programmable between -4 V and +4 V) Data Transfer Engine On board buffers size: 3x512Kx32 bits PCI data transfer: Bus-Master scatter-gather DMA |
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